Semiconductor devices using a bulk Si crystal have attained improved multifunctionality and high-speed capability in succession. This attainment is greatly attributed to scale-down of devices. Further device scale-down is required for continuing improvement in device performance in the future. In order to pursue further device scale-down, however, there exist many problems to be technically overcome. If device scale-down proceeds successfully, the optimal performance of the resultant devices is restricted by the physical properties (for example, mobility) of the bulk Si crystal as the material. In other words, as long as the bulk Si crystal is used as the material, it is difficult to dramatically improve the device performance.
In recent years, attempts of using a material other than the bulk Si crystal have been made to improve the device characteristics. One of such attempts is using a new material having a mobility greater than that of Si, such as a mixed crystal of silicon and germanium (SiGe) and a mixed crystal of silicon, germanium, and carbon (SiGeC). Another attempt is using a strained Si crystal. This is an approach of providing a new factor, strain, to a Si crystal to reduce scattering of carrier electrons called intervalley scattering and thus improve the mobility. The latter attempt, in particular, has also received attention from the industrial standpoint, for the reasons that improvement in performance is attained only by giving strain to the bulk Si crystal and that necessary machining of the device can be made only using the existing Si process technology (for example, oxidation and etching process technology).
Conventionally, a strained Si crystal as described above is produced by depositing a thick SiGe crystal layer on a Si substrate made of a bulk Si crystal and then depositing a Si crystal on the SiGe crystal layer. In general, when a SiGe crystal, which has a lattice constant greater than Si, is epitaxially grown on a Si substrate in the state that the lattice in the plane of the substrate is aligned with Si, a considerably large compressible strain is generated in the SiGe crystal. Once the thickness of the SiGe crystal deposited on the Si substrate exceeds a certain thickness (critical thickness), dislocations are generated between the Si substrate and the SiGe layer, and the strain is relieved. As a result, the in-plane lattice constant of the SiGe layer becomes greater than that at the surface of the Si substrate. When a Si crystal layer is epitaxially grown on the SiGe crystal layer, the in-plane lattice constant of the newly deposited Si matches with that of the strain-relieved SiGe crystal, and therefore the Si layer has a lattice constant greater than the inherent lattice constant of Si. As a result, a strained Si crystal layer undergoing tensile stress is produced (hereinafter, a crystal layer that causes lattice relieving and has an interstitial distance greater than a Si substrate, such as the SiGe crystal described above, is called a relieved buffer layer).
A conventional method for forming a strained Si crystal layer on a substrate will be described in more detail with reference to the relevant drawing.
FIG. 1 is a cross-sectional view of a substrate on which a strained Si crystal layer has been formed by a conventional method. To fabricate the substrate including the strained Si crystal layer, first, a SiGe crystal layer 103 having a thickness of several micrometers or more that exceeds a critical thickness is epitaxially grown on a Si substrate 101 by CVD. By this growth, dislocations are generated in the SiGe crystal layer 103, and thus the SiGe crystal layer 103 is subjected to lattice relieving. Thereafter, a Si crystal is deposited on the SiGe crystal layer 103 by CVD, to form a strained Si crystal layer 104.